Xilinx introduced the ISE Design Suite 12 software to enable breakthrough optimizations for power and cost with greater design productivity. For the first time, ISE design tools deliver intelligent clockgating technology that reduces dynamic power consumption by as much as 30 percent. The new suite also provides advances in timingdriven design preservation, AMBA 4 AXI4complaint IP support for plugandplay design, and an intuitive design flow with fourthgeneration partial reconfiguration capabilities that lowers system cost for a broad range of high performance applications.

With full production support for all Xilinx Virtex6 and Spartan6 FPGA families, the ISE 12 release continues its evolution as the industry s only domainspecific design suite with interoperable design flows and tool configurations for logic, digital signal processing (DSP), embedded processing, and systemlevel design. In addition, Xilinx incorporated a number of software infrastructure and methodology enhancements that improve run time, streamline system integration, and expand IP interoperability across its latest generation device families and Targeted Design Platforms.

Intelligent Automation for Power Optimization: ISE Design Suite 12 introduces the FPGA industry s first intelligent clockgating technology with fully automated analysis and finegrain (logic slice) optimization capabilities specifically developed to reduce the number of transitions, a primary contributing factor of dynamic power dissipation in digital designs. The technology works by analyzing designs using a series of unique algorithms to detect sequential elements...
The package Xilinx ISE Design Suite 12.1 includes the following modules:
- ISE Design Suite: Logic Edition
- ISE Design Suite: Embedded Edition
- ISE Design Suite: DSP Edition
- System Generator for DSP

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